| Popis: |
TSV (Through Silicon Via) is the key enabling technology for 2.5D & 3D IC packaging solution. As the 2.5D interposer design pushing towards smaller & shorter via due to I/O density and electrical performance, the warpage of thinner interposer is therefore much more challenging in thin wafer handling and assembly process. In this presentation, a TSV structure is introduced with fabricated interposer prototype, and could be assembled together with single-die/multi-chip on a substrate. The demonstrated interposer assembled in FCBGA (Flip Chip Ball Grid Array) has covered features such as low temperature fabrication process, low warpage, and low leakage with minimized TSV parasitic parameters. Electrical and stress characterizations, current density characterization up to 1100mA and Shadow Moire are performed and compared with simulation models for correlation study. Known-Good TSV and Si interposer are also reviewed and discussed in this presentation. Full validated reliability test, both die and package level, in conjunction with board level drop test, are presented to verify interposer fabrication, assembly process optimization, and interconnection stability. |
