| Autor: |
Santana, Juan, Pachiana, Gabriel, Markwirth, Thomas, Sohrmann, Christoph, Fischer, Bernhard, Matschnig, Martin |
| Jazyk: |
angličtina |
| Rok vydání: |
2022 |
| Předmět: |
|
| DOI: |
10.24406/publica-125 |
| Popis: |
The replacement of a key component within industrial embedded systems usually requires huge verification and validation efforts. Especially the replacement of the MCU core architecture normally entails significant changes to the HW/SW co-design and co-verification process, possibly including the purchase of costly design and verification IP. Our intended use-case is a system redesign where an established MCU is replaced by a RISC-V core. Since the complete redesign process requires a significant effort, a feasibility evaluation study helps to elaborate the system requirements and to detect possible issues early in the replacement process. Once feasibility has been demonstrated, hardware (re-)design may start. In this paper we propose a HW/SW co-verification methodology to evaluate the feasibility of an MCU core replacement based on a virtual prototype, thereby saving time and cost for the redesign process. This methodology links the VP development process with the requirements management process to re-use the test cases. |
| Databáze: |
OpenAIRE |
| Externí odkaz: |
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