Analog front-end and power management integration on a 0.13 μm CMOS ADSL SoC

Autor:	Mangesh Devidas Sadafale, Himamshu Gopalakrishna Khasnis, R. Menon, Anmol Sharma, M. Gambhir, R. Sriram, A. Raychoudhary, Sandeep Oswal, B. Vijayvardhan, Nilesh A. Ahuja, R. Srinivasa, S. Prasad, B. Sharma, R. Gireesh, Fernando A. Mujica
Rok vydání:	2004
Předmět:	Analog front-end Engineering Asymmetric digital subscriber line Digital subscriber line DSL modem CMOS Customer-premises equipment business.industry Symmetric digital subscriber line Electronic engineering Electrical engineering System on a chip business
Zdroj:	2004 International Conference on Integrated Circuit Design and Technology (IEEE Cat. No.04EX866).
DOI:	10.1109/icicdt.2004.1309944
Popis:	This paper describes the analog and power management aspects of a single chip asymmetric digital subscriber line (ADSL) customer premises equipment (CPE) router. We address the system partitioning between analog and digital resulting in optimum system cost and performance for a .13 /spl mu/m CMOS process.
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_________::be9999b5c8f1d887f9891b3e093a395d https://doi.org/10.1109/icicdt.2004.1309944 Zobrazit plný text záznamu