Autor: |
Tsuneo Inaba, Shigeyoshi Watanabe, Kazuya Ohuchi, Yukihito Oowaki, T. Ozaki, Daisaburo Takashima |
Rok vydání: |
2002 |
Předmět: |
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Zdroj: |
Digest of Technical Papers., Symposium on VLSI Circuits.. |
DOI: |
10.1109/vlsic.1995.520704 |
Popis: |
We have proposed a new 1/4 Vcc bit-line swing architecture and related sense amplifier for 1 V 4 Gb DRAM and beyond. These schemes reduce power dissipation to 40% without degradation of the read-out signal and also improve device reliability. |
Databáze: |
OpenAIRE |
Externí odkaz: |
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