An Adaptive Bitrate Clock and Data Recovery Circuit for Communication Signal Analyzers
| Autor: | C. Sánchez-Azqueta, J. Aguirre, E. Guerrero, C. Gimeno, Santiago Celma |
|---|---|
| Rok vydání: | 2017 |
| Předmět: |
business.industry
Computer science Instrumentation 020208 electrical & electronic engineering Detector Electrical engineering 02 engineering and technology Signal 020202 computer hardware & architecture Data recovery Phase-locked loop CMOS Hardware_INTEGRATEDCIRCUITS 0202 electrical engineering electronic engineering information engineering Electronic engineering Electrical and Electronic Engineering Oscilloscope business Voltage |
| Zdroj: | IEEE Transactions on Instrumentation and Measurement. 66:191-193 |
| ISSN: | 1557-9662 0018-9456 |
| Popis: | Many measurement instruments require an external timing reference to perform an accurate measurement. In equivalent-time oscilloscopes, for example, a trigger signal properly aligned to the data is essential, since they base their operation on a very accurate delay of the trigger, which is obtained by a clock and data recovery (CDR) circuit. In this paper, an adaptive bitrate CDR circuit for instrumentation applications is presented. It is designed in a standard 0.18- $\mu \text{m}$ CMOS technology with a single supply voltage of 1.8 V and operates from 312.5 Mb/s to 2.5 Gb/s with a maximum power consumption of 140 mW and occupies an area of 1.5 mm $\times $ 0.6 mm. |
| Databáze: | OpenAIRE |
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