Selection of circuit geometry for miniaturized microwave components based on concurrent optimization of performance and layout area
Autor: | Slawomir Koziel, Piotr Kurgan |
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Rok vydání: | 2019 |
Předmět: |
Computer science
Reliability (computer networking) Process (computing) 020206 networking & telecommunications Geometry 02 engineering and technology Set (abstract data type) 03 medical and health sciences symbols.namesake 0302 clinical medicine Electric power transmission Jacobian matrix and determinant 0202 electrical engineering electronic engineering information engineering symbols Miniaturization Penalty method Minification Electrical and Electronic Engineering 030217 neurology & neurosurgery |
Zdroj: | AEU - International Journal of Electronics and Communications. 108:287-294 |
ISSN: | 1434-8411 |
DOI: | 10.1016/j.aeue.2019.06.009 |
Popis: | The paper presents a framework for automated EM-driven circuit geometry selection of miniaturized microwave components. Selection of a particular layout is based directly on miniaturization rates achieved for a set of candidate circuit geometries. Size reduction of the considered structures is obtained by replacing their main building blocks (i.e., conventional transmission lines) with slow-wave composite cells and meander lines. The proposed method primarily aims at minimization of the structure layout area by adjusting all relevant geometry parameters of its compact building blocks. At the same time, the process ensures satisfying the assumed design requirements by means of a penalty function approach. The problem at hand is solved iteratively using a trust-region-embedded gradient search with the Jacobian matrix estimated at the level of a coarse-discretization EM model of individual circuit building blocks for improved computational efficiency. The proposed methodology is verified by two case studies involving branch-line and rat-race couplers. Each design example is considered in eight different layout versions. The miniaturization rates obtained for the considered circuit geometries range between 63.9% and 76% for the first application example, as well as 80.6% and 87.5% for the second one, respectively. Experimental data validate the reliability of the proposed approach. |
Databáze: | OpenAIRE |
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