Morphable Counters: Enabling Compact Integrity Trees For Low-Overhead Secure Memories
| Autor: | Wendy Arnott Elsasser, Gururaj Saileshwar, Ramrakhyani Prakash S, José A. Joao, Moinuddin K. Qureshi, Prashant J. Nair |
|---|---|
| Rok vydání: | 2018 |
| Předmět: |
010302 applied physics
Speedup business.industry Computer science 02 engineering and technology Encryption Merkle tree 01 natural sciences 020202 computer hardware & architecture Reduction (complexity) Tree (data structure) Tree traversal Embedded system 0103 physical sciences Scalability 0202 electrical engineering electronic engineering information engineering business |
| Zdroj: | MICRO |
| Popis: | Securing off-chip main memory is essential for protection from adversaries with physical access to systems. However, current secure-memory designs incur considerable performance overheads - a major cause being the multiple memory accesses required for traversing an integrity-tree, that provides protection against man-in-the-middle attacks or replay attacks. In this paper, we provide a scalable solution to this problem by proposing a compact integrity tree design that requires fewer memory accesses for its traversal. We enable this by proposing new storage-efficient representations for the counters used for encryption and integrity-tree in secure memories. Our Morphable Counters are more cacheable on-chip, as they provide more counters per cacheline than existing split counters. Additionally, they incur lower overheads due to counter-overflows, by dynamically switching between counter representations based on usage pattern. We show that using Morphable Counters enables a 128-ary integrity-tree, that can improve performance by 6.3% on average (up to 28.3%) and reduce system energy-delay product by 8.8% on average, compared to an aggressive baseline using split counters with a 64-ary integrity-tree. These benefits come without any additional storage or reduction in security and are derived from our compact counter representation, that reduces the integrity-tree size for a 16GB memory from 4MB in the baseline to 1MB. Compared to recently proposed VAULT [1], our design provides a speedup of 13.5% on average (up to 47.4%). |
| Databáze: | OpenAIRE |
| Externí odkaz: |
|