Time tick based method for measuring static errors of ADC
| Autor: | V. Abhaikumar, K. Hariharan, R. K. M. Rajkumar |
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| Rok vydání: | 2011 |
| Předmět: | |
| Zdroj: | Instruments and Experimental Techniques. 54:176-182 |
| ISSN: | 1608-3180 0020-4412 |
| DOI: | 10.1134/s0020441211020242 |
| Popis: | This paper presents a novel Time Tick based Built In Self Test (TT BIST) for measuring the static errors of an Analog to Digital Converter (ADC). The proposed method determines the period elapsed during transition between two consecutive digital levels and compares it with the ideal period of transition. A counter that works, at higher speed relative to the sampling rate of the ADC under test, is used. It counts the number of time ticks occurred during every transition. The required ramp signal is generated dynamically, using current source with digital switch for selecting the equivalent test signal. Further to support testing of errors in ratiometric ADC, a slope conditioning module is also implemented. The entire computation cycle is done in a single ramp cycle whereas in conventional histogram method multiple waveforms are required. Thus, the proposed TT method requires less time to achieve desired accuracy levels by choosing the appropriate slope of the ramp signal. |
| Databáze: | OpenAIRE |
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