Gate controlled vertical-lateral NPN bipolar transistor in 90nm RF CMOS process
| Autor: | M. Brunsman, Guofu Niu, G.A. Rezvani, C.P. Chao, C. Xie, Zhiming Feng, H.C. Tseng, Shuo-Mao Chen, Yan Cui |
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| Rok vydání: | 2008 |
| Předmět: |
Materials science
business.industry Heterostructure-emitter bipolar transistor Bipolar junction transistor Electrical engineering Hardware_PERFORMANCEANDRELIABILITY Current injection technique CMOS Logic gate MOSFET Hardware_INTEGRATEDCIRCUITS Optoelectronics Flicker noise business NMOS logic Hardware_LOGICDESIGN |
| Zdroj: | 2008 IEEE Bipolar/BiCMOS Circuits and Technology Meeting. |
| DOI: | 10.1109/bipol.2008.4662706 |
| Popis: | A new gate controlled bipolar transistor is introduced in this paper which combines the lateral and vertical bipolar effect in standard NMOS device in a 90 nm triple well process technology. A current gain of more than 200, cut off frequency of about 7 GHz, and lower flicker noise compared with CMOS devices were achieved without any change to process and/or introduction of any extra masking step. The impact of gate length, the role of vertical and lateral NPN components, and effect of emitter area on operation of this device are discussed. |
| Databáze: | OpenAIRE |
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