On-Wafer Capacitors Under Mechanical Stress
| Autor: | Pekka Heino, Päivi H. Karjalainen |
|---|---|
| Rok vydání: | 2006 |
| Předmět: |
Materials science
business.industry Hardware_PERFORMANCEANDRELIABILITY Integrated circuit Computer Science Applications Electronic Optical and Magnetic Materials law.invention Stress (mechanics) Capacitor System in package CMOS Hardware_GENERAL Mechanics of Materials law Hardware_INTEGRATEDCIRCUITS Electronic engineering Optoelectronics Wafer Electrical and Electronic Engineering business Electrical impedance Hardware_LOGICDESIGN |
| Zdroj: | Journal of Electronic Packaging. 129:287-290 |
| ISSN: | 1528-9044 1043-7398 |
| DOI: | 10.1115/1.2753918 |
| Popis: | New packaging materials make it possible to produce flexible system in package (SIP) and system on package (SOP) modules. However, in these the integrated circuits are exposed to increased mechanical stresses. The stresses may become even more severe when thinned chips are used. The effect of mechanical stress on the characteristics of on-wafer capacitors was studied. The mechanical stress increased clearly the resonance frequency of poly-insulator-poly capacitors, but caused only minor impedance changes for metal-insulator-metal capacitors. No fatal stress-induced phenomenon was found and the on-wafer capacitors should also operate correctly in SIP and SOP modules. The test chips were processed with two different complementary metal oxide semiconductor processes and the tested on-wafer capacitors had values of 4.8–47pF. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
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