A High-Performance Common-Mode Noise Absorption Circuit Based on Phase Modification Technique
| Autor: | Chao-Kai Chan, Tzong-Lin Wu |
|---|---|
| Rok vydání: | 2019 |
| Předmět: |
Physics
Radiation Attenuation Acoustics 020206 networking & telecommunications 02 engineering and technology Stopband Condensed Matter Physics Noise (electronics) Electromagnetic interference Interference (communication) Distortion 0202 electrical engineering electronic engineering information engineering Digital signal Electrical and Electronic Engineering Group delay and phase delay |
| Zdroj: | IEEE Transactions on Microwave Theory and Techniques. 67:4394-4403 |
| ISSN: | 1557-9670 0018-9480 |
| DOI: | 10.1109/tmtt.2019.2940015 |
| Popis: | In this article, a high-performance common-mode noise absorption circuit (CMNAC) is proposed for solving electromagnetic interference (EMI) or radio-frequency interference (RFI) problems in high-speed differential digital systems. Instead of reflecting common-mode noises by conventional common-mode filters (CMFs), the common-mode noises can be absorbed in the proposed circuit. In addition, the phase modification technique is utilized to enhance the common-mode noise absorption rate and the differential-mode eye diagram in this CMNAC. In the common-mode half circuit (CMHC), the phase inversion of the subnetwork adds a destructive combination of the stopband energy, resulting in higher stopband attenuation. In the differential-mode half circuit (DMHC), the phase linearization leads to flat group delay, reducing the distortion in high-speed digital signal transmission in the lumped circuit. Using a standard integrated passive device (IPD) process, this CMNAC is implemented for the demonstration. The circuit occupies an area of only 1.138 mm $\times0.822$ mm. From the measured results, the proposed circuit exhibits the common-mode suppression level larger than 15 dB from 4 to 20 GHz and the absorption rate over 90% from 3.8 to 17.4 GHz with a fractional bandwidth 128%. In addition, the measured eye diagram shows that the proposed circuit can support high-speed transmission up to 10 Gb/s. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
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