Design of a low power high-speed dynamic latched comparator in 65- nm CMOS using peaking techniques

Autor:	Hypolite Pierre Bakoune, Evariste Wembe Tafo, Adolphe Moukengué Imano
Rok vydání:	2023
Předmět:	Hardware and Architecture Signal Processing Surfaces Coatings and Films
Zdroj:	Analog Integrated Circuits and Signal Processing. 115:219-232
ISSN:	1573-1979 0925-1030
DOI:	10.1007/s10470-023-02157-9
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_________::b7875fb2c334b0c79b2fe77d56700db6 https://doi.org/10.1007/s10470-023-02157-9 Zobrazit plný text záznamu Full text from SpringerLink