3-D Integration and ESD Protection: Design and Analysis
| Autor: | Souvick Mitra, You Li, Robert Gauthier, Gebreselasie Ephrem G, Thuy Tran-quinn, Koushik Ramachandran |
|---|---|
| Rok vydání: | 2016 |
| Předmět: |
010302 applied physics
Computer science Circuit performance Design of experiments Process (computing) 020206 networking & telecommunications Topology (electrical circuits) Hardware_PERFORMANCEANDRELIABILITY 02 engineering and technology 01 natural sciences Electronic Optical and Magnetic Materials Reliability engineering 0103 physical sciences Hardware_INTEGRATEDCIRCUITS 0202 electrical engineering electronic engineering information engineering Electronic engineering Electrical and Electronic Engineering Leakage test Safety Risk Reliability and Quality Hardware_LOGICDESIGN Degradation (telecommunications) |
| Zdroj: | IEEE Transactions on Device and Materials Reliability. 16:497-503 |
| ISSN: | 1558-2574 1530-4388 |
| DOI: | 10.1109/tdmr.2016.2627522 |
| Popis: | A set of design of experiments matrix was created to evaluate the possibilities of electrostatic-discharge (ESD) failures during the complex 3-D integration process as a function of the ESD protection level. A detailed set of pass/fail criteria based on circuit performance was established. Various phases of 3-D integration are monitored for ESD failures. Based on measured samples, it was observed that the functionality test and leakage test show circuit performance degradation and a larger fail rate after chip-to-chip bonding on designs without ESD protection. |
| Databáze: | OpenAIRE |
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