| Autor: |
Taejoong Song, Hoyoung Tang, Jae-Seung Choi, Baeck Sang-Yeop, Lee Inhak, Dong-Wook Seo, Jongwook Kye |
| Rok vydání: |
2021 |
| Předmět: |
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| Zdroj: |
VLSI Circuits |
| Popis: |
Voltage Auto Tracking Cell Power Lowering (VACPL) Write Assist circuit is proposed for low-power SRAM with dual-rail architecture. VACPL adaptively controls the cell voltage with respect to the dual rail offset voltage to maximize bitcell write-ability. A 5nm EUV FinFET test chip demonstrates 210mV VMIN improvement and 4.7x larger range of operating voltage with VACPL. The proposed VACPL and VATA achieves 95.2% leakage power reduction by lowering VDDC by 400mV in 5nm 5G mobile device. |
| Databáze: |
OpenAIRE |
| Externí odkaz: |
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