A 25 MS/s 14 b 200 mW ΣΔ modulator in 0.18 μm CMOS

Autor:	Qiuting Huang, Pio Balmelli
Rok vydání:	2004
Předmět:	Physics Signal-to-noise ratio CMOS Power consumption business.industry Dynamic range Circuit design Electrical engineering Waveform Chip business Switched capacitor
Zdroj:	2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519).
Popis:	The design of a fifth-order 4-b quantizer single-loop ΣΔ modulator is presented that achieves 25-MS/s conversion rate with 84 dB of dynamic range and 82 dB of signal-to-noise ratio. Implemented in a 0.18-μm CMOS technology, the 0.95-mm 2 chip has a power consumption of 200 mW from a 1.8-V supply.
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_________::b72d98dfab19e7103e333b6fe24907c6 https://doi.org/10.1109/isscc.2004.1332600 Zobrazit plný text záznamu