Definition of dielectric breakdown for ultra thin (<2 nm) gate oxides

Autor: Tanya Nigam, M. Depas, M.M. Heyns
Rok vydání: 1997
Předmět:
Zdroj: Solid-State Electronics. 41:725-728
ISSN: 0038-1101
Popis: The different stages of wear-out of an ultra thin 1.7 nm SiO2 during a time dependent dielectric breakdown test of a poly-Si gate metal-oxide-silicon capacitor structure are discussed. For these ultra thin gate oxides, dielectric breakdown already occurs in the direct tunnelling regime. It is shown that the initial continuous increase of the direct tunnel current during constant voltage stress is followed by a complex fluctuation mode. This is defined as the dielectric breakdown of these ultra thin (
Databáze: OpenAIRE