Through-Silicon Hole Interposers for 3-D IC Integration
| Autor: | Yu-Mei Cheng, Ren-Shing Cheng, Li-Ling Liao, Jui-Feng Hung, Yu-Lin Chao, Ra-Min Tain, Ming-Ji Dai, Yu-Wei Huang, Heng-Chieh Chien, Chun-Hsien Chien, Wei-Chung Lo, Chau-Jie Zhan, Ching-Kuan Lee, Ming-Jer Kao, Sheng-Tsai Wu, John H. Lau |
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| Rok vydání: | 2014 |
| Předmět: |
Materials science
Fabrication Silicon business.industry Emphasis (telecommunications) Electrical engineering chemistry.chemical_element Hardware_PERFORMANCEANDRELIABILITY Temperature cycling Chip Industrial and Manufacturing Engineering Electronic Optical and Magnetic Materials Shock (mechanics) chemistry Hardware_INTEGRATEDCIRCUITS Interposer Optoelectronics Electrical and Electronic Engineering business |
| Zdroj: | IEEE Transactions on Components, Packaging and Manufacturing Technology. 4:1407-1419 |
| ISSN: | 2156-3985 2156-3950 |
| Popis: | In this investigation, a system-in-package (SiP) that consists of a very low-cost interposer with through-silicon holes (TSHs) and with chips on its top and bottom sides (a real 3-D IC integration) is studied. Emphasis is placed on the fabrication of a test vehicle to demonstrate the feasibility of this SiP technology. The design, materials, and process of the top chip, bottom chip, TSH interposer, and final assembly will be presented. Shock and thermal cycling tests will be performed to demonstrate the integrity of the SiP structure. |
| Databáze: | OpenAIRE |
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