A 120 mV Supply, Triode-Regulated Femto-Watt CMOS Voltage Reference Design
| Autor: | Antonio Petraglia, Lucas Souza da Silva, Fabian Olivera |
|---|---|
| Rok vydání: | 2021 |
| Předmět: |
Power supply rejection ratio
Materials science business.industry Circuit design 020208 electrical & electronic engineering Transistor Electrical engineering Hardware_PERFORMANCEANDRELIABILITY 02 engineering and technology 020202 computer hardware & architecture law.invention Threshold voltage Triode law Logic gate Hardware_INTEGRATEDCIRCUITS 0202 electrical engineering electronic engineering information engineering Electrical and Electronic Engineering business Voltage reference Voltage |
| Zdroj: | IEEE Transactions on Circuits and Systems II: Express Briefs. 68:587-591 |
| ISSN: | 1558-3791 1549-7747 |
| DOI: | 10.1109/tcsii.2020.3046368 |
| Popis: | This brief presents the design and sizing of a femto-watt voltage reference based on the temperature compensation of N-type and P-type standard transistors. A short-channel dimension transistor working in triode region is added between the source and gate terminals of the traditional self-bias structure, which demonstrates efficient low-power and low-voltage operations. The circuit design was carried out in a 180 nm process. Post-layout simulation results verified the proper circuit operation and produced a reference voltage of 65.7 mV. With a minimum supply voltage of 120 mV, the circuit consumes 252 fW at room temperature, has mean and best temperature coefficients (TCs) of 89.81 ppm/°C and 10.61 ppm/°C, respectively, from −40 to 120°C, and presents a power supply rejection ratio (PSRR) of −61 dB. |
| Databáze: | OpenAIRE |
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