| Autor: |
Christopher N. Collins, Ed Sprogis, Mike Cranmer, Daniel Berger, Franklin M. Baez, Michael J. Shapiro, Jean Audet, Subramania S. Iyer |
| Rok vydání: |
2012 |
| Předmět: |
|
| Zdroj: |
2012 IEEE 21st Conference on Electrical Performance of Electronic Packaging and Systems. |
| DOI: |
10.1109/epeps.2012.6457902 |
| Popis: |
A multichip module package has been designed in IBM's silicon technology. The module consists of two chips of same size and type communicating horizontally through a silicon interposer to a large ASIC chip. The chip to chip links operate at 8 Gbps with a loss of 0.5 dB/mm and reflections < 20 dB. All links are skew matched to within 2 ps. Model to hardware correlation was performed and trace loss is within 0.1 dB of modeling data. The input to the module consists of a high speed RF signal and the module was optimized for board to package transition. Outputs of the module are 15Gbps high speed links. Both input and output signals go up or down a through silicon via (TSV) in the silicon interposer as part of their electrical paths. TSV parameters do not limit the electrical performance of the module. |
| Databáze: |
OpenAIRE |
| Externí odkaz: |
|
