SRAM Radiation Hardening Through Self-Refresh Operation and Error Correction
| Autor: | Loi Van Le, Sharma Ruchi, M. Sultan M. Siddiqui, Tony Tae-Hyoung Kim, Taegeun Yoo, Ik Joon Chang |
|---|---|
| Rok vydání: | 2020 |
| Předmět: |
Hardware_MEMORYSTRUCTURES
business.industry Computer science Electrical engineering Hardware_PERFORMANCEANDRELIABILITY Integrated circuit Electronic Optical and Magnetic Materials law.invention Soft error CMOS Single event upset law Static random-access memory Electrical and Electronic Engineering Safety Risk Reliability and Quality Error detection and correction business Radiation hardening Energy (signal processing) |
| Zdroj: | IEEE Transactions on Device and Materials Reliability. 20:468-474 |
| ISSN: | 1558-2574 1530-4388 |
| Popis: | In Space applications, the scaling of transistors has made integrated circuits (ICs) more susceptible to soft errors, caused by radiation strikes. When a soft error causes a bit flip in a memory device, this event is referred to as a Single Event Upset (SEU). Since SEU errors degrade system performance and eventually lead to system failure, the design of radiation-resilient memory is substantial. This paper presents a radiation resilient SRAM with a self-refresh scheme for lowering the number of errors in each row below a threshold number. The proposed self-refresh operation reads out the stored data and performs single error correction using a simple algorithm during its hold/idle mode. A 4KB SRAM test chip in 65nm CMOS technology demonstrates a significant reduction in errors with the self-refresh operation. When the SRAM test chip was exposed to accelerated proton radiation with an energy level of 39.38 MeV, the self-refresh scheme reduces the number of uncorrectable errors by $25\times $ and $8\times $ lesser for the fluence of $9.82\times 10^{11}$ particles/cm2 and $49.1\times 10^{11}$ particles/cm2, respectively. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
|