Layered T methodology in QCA: NAND/NOR based circuit designing approach
| Autor: | Arnab Guha Roy, Chiradeep Mukherjee, Shirsha Chakraborty, Souvik Mondal, Aritro Sinha, Dipayan Singha Roy, Sayak Pramanik, Subham Bid |
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| Rok vydání: | 2016 |
| Předmět: |
Majority function
Theoretical computer science AND-OR-Invert Computer science NAND gate NOR logic 02 engineering and technology 021001 nanoscience & nanotechnology NAND logic 020202 computer hardware & architecture XNOR gate Logic gate 0202 electrical engineering electronic engineering information engineering Arithmetic 0210 nano-technology Gate equivalent Hardware_LOGICDESIGN Quantum cellular automaton |
| Zdroj: | UEMCON |
| DOI: | 10.1109/uemcon.2016.7777902 |
| Popis: | Quantum Cellular Automata now has several deduction methodologies none of which explores universal NAND/NOR based design in Boolean reduction techniques. As Boolean laws reveal the intuitive NAND and NOR based reductions, higher cell requirement for majority function can be avoided if NAND/NOR based methodology is used. This work proposes Layered T Gate (LT Gate) which works on the basis of universal NAND and NOR logic. Layered T gate requires algorithms to implement digital designs especially if standard functions are to be considered. Layered T Gate is also used to implement 2×1 multiplexer as primitive who shows 37.3% reduction in area requirement compared to the latest design. |
| Databáze: | OpenAIRE |
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