Design of 64-bit Floating-Point Arithmetic and Logical Complex Operation for High-Speed Processing

Autor:	D. Bhuvana Suganthi, M. Shivaramaiah, A. Punitha, M K Vidhyalakshmi, S. Thaiyalnayaki
Rok vydání:	2023
Zdroj:	2023 International Conference on Intelligent and Innovative Technologies in Computing, Electrical and Electronics (IITCEE).
DOI:	10.1109/iitcee57236.2023.10091011
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_________::b23f65d97156091415140e7109eba27a https://doi.org/10.1109/iitcee57236.2023.10091011 Zobrazit plný text záznamu