A 160 mV Robust Schmitt Trigger Based Subthreshold SRAM

Autor:	Kaushik Roy, Keejong Kim, Jaydeep P. Kulkarni
Rok vydání:	2007
Předmět:	Engineering Hardware_MEMORYSTRUCTURES business.industry Subthreshold conduction Electrical engineering Process corners Process variation CMOS Memory cell Schmitt trigger Low-power electronics Electronic engineering Static random-access memory Electrical and Electronic Engineering business
Zdroj:	IEEE Journal of Solid-State Circuits. 42:2303-2313
ISSN:	0018-9200
DOI:	10.1109/jssc.2007.897148
Popis:	We propose a novel Schmitt trigger (ST) based differential 10-transistor SRAM (static random access memory) bitcell suitable for subthreshold operation. The proposed Schmitt trigger based bitcell achieves 1.56 x higher read static noise margin (SNM) ( Vdd = 400 mV) compared to the conventional 6T cell. The robust Schmitt trigger based memory cell exhibits built-in process variation tolerance that gives tight SNM distribution across the process corners. It utilizes differential operation and hence does not require any architectural changes from the present 6T architecture. At iso-area and iso-read-failure probability the proposed memory bitcell operates at a lower (175 mV) Vdd with 18% reduction in leakage and 50% reduction in read/write power compared to the conventional 6T cell. Simulation results show that the proposed memory bitcell retains data at a supply voltage of 150 mV. Functional SRAM with the proposed memory bitcell is demonstrated at 160 mV in 0.13 mum CMOS technology.
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_________::b15589c07baf2129f23da0a609522a18 https://doi.org/10.1109/jssc.2007.897148 Zobrazit plný text záznamu