The Gate Current in MOSFETs Versus Planar-NOI Devices
| Autor: | Elena Manea, Catalin Parvulescu, Avireni Srinivasulu, Florin Babarada, Alina Popescu, Cristian Ravariu |
|---|---|
| Rok vydání: | 2018 |
| Předmět: |
010302 applied physics
Materials science business.industry Transistor Semiconductor device modeling Insulator (electricity) 02 engineering and technology 021001 nanoscience & nanotechnology 01 natural sciences law.invention Semiconductor Planar law Logic gate 0103 physical sciences MOSFET Optoelectronics 0210 nano-technology business Quantum tunnelling |
| Zdroj: | 2018 International Semiconductor Conference (CAS). |
| DOI: | 10.1109/smicnd.2018.8539742 |
| Popis: | Recently reported, the Nothing On Insulator (NOI) device is based on the tunneling through a ultra-thin insulator placed between two semiconductors. A direct implementation of the NOI transistor that requires a vertical cavity etching in Si of 2nm width is a difficult technological task. Therefore, this paper proposes a simpler structure, based on the planar Si-technology. Rotating the NOI structure by 90°, the width of the cavity becomes the thickness of the cavity. If the vacuum is replaced by oxide, results a MOS capacitor without lateral junction but with lateral drain that is called p-NOI (planar-NOI variant). The p-NOI structure is simulated in Atlas and the results are compared with measured currents through the gate of fabricated MOSFETs. The main conduction mechanism is Fowler-Nordheim and secondary is quantum tunneling. The tunneling currents of the p-NOI structures obeys to the exponential law and are similar to the gate MOSFET currents. The currents are dominated by the insulator thickness and the gate voltage. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
|