| Autor: |
Wataru Saito, Shigeo Koduki, Satoshi Aida, Masaru Izumisawa |
| Rok vydání: |
2011 |
| Předmět: |
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| Zdroj: |
2011 IEEE 23rd International Symposium on Power Semiconductor Devices and ICs. |
| DOI: |
10.1109/ispsd.2011.5890854 |
| Popis: |
A new MOS-gate structure was proposed and demonstrated to improve the switching trade-off characteristics between noise and loss in high-voltage MOSFETs. The lightly p-doped dummy base layer under the gate electrode modulates C gd -V ds curve due to the depletion under high applied voltage and the turn-off dV/dt can be suppressed even with high-speed switching. The fabricated device showed the surge voltage suppression of 50 V or the turn-off loss reduction of 20% in the turn-off switching test with an inductive load. In the flyback converter operation, it was also shown that the trade-off characteristics between the radiation noise and total power loss were improved by the proposed dummy base structure. |
| Databáze: |
OpenAIRE |
| Externí odkaz: |
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