Performance Enhancement by Optimization of Poly Grain Size and Channel Thickness in a Vertical Channel 3-D NAND Flash Memory
| Autor: | Arvind Kumar, Sanjeev Kumar Manhas, Upendra Mohan Bhatt |
|---|---|
| Rok vydání: | 2018 |
| Předmět: |
010302 applied physics
Physics Vertical channel Condensed matter physics Nand flash memory 020208 electrical & electronic engineering 02 engineering and technology Limiting 01 natural sciences Grain size Electronic Optical and Magnetic Materials Threshold voltage 0103 physical sciences Trap density 0202 electrical engineering electronic engineering information engineering Grain boundary Electrical and Electronic Engineering Performance enhancement |
| Zdroj: | IEEE Transactions on Electron Devices. 65:1781-1786 |
| ISSN: | 1557-9646 0018-9383 |
| Popis: | String read current ( ${I}_{\textsf {read}}$ ) reduction with rising mold height and grain boundary traps is one of the major hurdle in the development of 3-D NAND flash memory. In this paper, we have investigated ${I}_{\textsf {read}}$ with variation in polysilicon channel grain size (GS), grain boundary trap density, and channel thickness ( ${T}_{\textsf {Si}}$ ), using TCAD. We find that under a critical value of GS, ${I}_{\textsf {read}}$ decreases with increase in ${T}_{\textsf {Si}}$ . This is attributed to the fact that with smaller GS, the total number of grain boundaries and associated traps are significantly higher. Moreover, there exists a typical value of GS for which ${I}_{\textsf {read}}$ is independent of ${T}_{\textsf {Si}}$ , which is desirable to minimize the deviations in ${I}_{\textsf {read}}$ arising from ${T}_{\textsf {Si}}$ variations. The resulting tradeoff in the design of more efficient 3-D NAND flash is demonstrated and discussed. Further, it is found that ${I}_{\textsf {read}}$ increases significantly by limiting the polysilicon channel grain boundary trap concentration under 1012 cm−2. The results presented in this paper are crucial for optimizing ${I}_{\textsf {read}}$ and program/erase threshold voltage ( ${V}_{T}$ ) window, and serve as key guidelines in the design of 3-D NAND flash memory with better performance. |
| Databáze: | OpenAIRE |
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