A Two-Stage Large-Capacitive-Load Amplifier With Multiple Cross-Coupled Small-Gain Stages
| Autor: | Jianping Guo, Kai Ho Mak, Tin Wai Mui, Shi Bu, Marco Ho, Wang Ling Goh, Ka Nang Leung, Hiu Ching Poon, Ming Wai Lau |
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| Rok vydání: | 2016 |
| Předmět: |
Physics
0209 industrial biotechnology business.industry Amplifier Transconductance 020208 electrical & electronic engineering Electrical engineering Phase margin Slew rate 02 engineering and technology Fully differential amplifier 020901 industrial engineering & automation CMOS Hardware and Architecture Operational transconductance amplifier 0202 electrical engineering electronic engineering information engineering Electrical and Electronic Engineering business Software Gain–bandwidth product |
| Zdroj: | IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 24:2580-2592 |
| ISSN: | 1557-9999 1063-8210 |
| DOI: | 10.1109/tvlsi.2016.2515131 |
| Popis: | A two-stage large-capacitive-load amplifier with multiple cross-coupled small-gain stages is proposed in this paper. The cross-coupled structure of the small-gain stages augments the large-signal responses, providing significant improvement in the effective output-stage transconductance and, hence, the gain–bandwidth product (GBW). Implemented in a standard 0.13- $\mu \text{m}$ CMOS technology and powered by a 0.7 V supply with a current consumption of $20~\mu \text{A}$ , the proposed amplifier achieves the GBW of 1.17 MHz and the phase margin of 74.8° while driving a capacitive load of 9.5 nF. The average slew rate is 0.3679 V/ $\mu \text{s}$ . The on-chip compensation capacitor is only 1.62 pF. The active chip area is 0.0056 mm2. |
| Databáze: | OpenAIRE |
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