0.5T0.5R - Introducing an Ultra-Compact Memory Cell Enabled by Shared Graphene Edge-Contact and h-BN Insulator
| Autor: | Kaustav Banerjee, Dujiao Zhang, Wei Cao, Chao-Hui Yeh |
|---|---|
| Rok vydání: | 2020 |
| Předmět: |
010302 applied physics
Materials science business.industry Graphene Transistor 02 engineering and technology 021001 nanoscience & nanotechnology 01 natural sciences law.invention Resistive random-access memory Memory management Neuromorphic engineering law Memory cell Logic gate 0103 physical sciences Optoelectronics 0210 nano-technology business Ultrashort pulse |
| Zdroj: | 2020 IEEE International Electron Devices Meeting (IEDM). |
| Popis: | In this work, we experimentally demonstrate, in a manufacture-friendly process, a hybrid memory device to replace the traditional 1T1R memory unit that is composed of one-transistor and one-resistive-random-access-memory (RRAM), i.e., two separate devices. This novel device, which can be considered as a 0.5T0.5R memory cell, is structurally enabled by utilizing the unique graphene edge-contact and resistively switchable hexagonal boron nitride (h-BN) insulator. Aided by design optimization, record performance ( 1000), have been achieved by this 0.5T0.5R memory cell. Moreover, the observed cell-resistance’s fine-tunability with ultrashort pulse count, pulse amplitude, and gate voltage uncovers the potential of this device for neuromorphic and in-memory computing. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
|