A New Fractional-N PLL Frequency Synthesizer

Autor:	Kazutoshi Tsuda, Shigeki Obote, Yutaka Fukui, Kouichi Syoubu, Yasuaki Sumi
Rok vydání:	1997
Předmět:	Frequency divider Frequency synthesizer Phase-locked loop Speedup Hardware and Architecture Computer science Control theory General Medicine Electrical and Electronic Engineering Division (mathematics) Phase detector Current divider Pulse (physics)
Zdroj:	Journal of Circuits, Systems and Computers. :395-405
ISSN:	1793-6454 0218-1266
DOI:	10.1142/s0218126697000292
Popis:	Recently, the speedup of lock up time is required in the Phase Locked Loop (PLL) frequency synthesizer. The fractional-N method is one of the most important techniques among the speedup methods proposed hitherto. The fractional-N programmable divider can divide not only an integer step but also a fractional one. However, the phase detector always generates the phase error pulse in every period of reference frequency and the elimination of this phase error pulse seems to be difficult. In this paper, a new fractional-N programmable divider is proposed. In this divider, the width of phase error pulse is decreased by introducing the new division ratio (N + 1/2) besides N and (N + 1). Then, the width of maximum phase error pulse in the new fractional-N programmable divider is less than or equal to half of that of the conventional one.
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_________::af83eaa57bec2a4cb33f4c4dc478ddd7 https://doi.org/10.1142/s0218126697000292 Zobrazit plný text záznamu