Insulated gate transistor modeling and optimization
| Autor: | W.R. Van Dell, K. Owyang, Hamza Yilmaz, Mike F. Chang |
|---|---|
| Rok vydání: | 1984 |
| Předmět: |
Physics
business.industry Bipolar junction transistor Transistor Electrical engineering High voltage Hardware_PERFORMANCEANDRELIABILITY Carrier lifetime law.invention law Power electronics MOSFET Hardware_INTEGRATEDCIRCUITS Electronic engineering business Hardware_LOGICDESIGN Communication channel Voltage |
| Zdroj: | 1984 International Electron Devices Meeting. |
| DOI: | 10.1109/iedm.1984.190700 |
| Popis: | The Insulated Gate Transistor (IGT) is a new power switching device which appears promising for high voltage applications. As of this date, however, this device has not been quantitatively modeled or optimized. The aim of the present study is to develop an accurate and effficient model of the IGT. The IGT is modeled as a Bipolar Junction Transistor (BJT) driven by a MOSFET. The bipolar nature of the device is examined by studying the effects of carrier lifetime on electrical performances. This model also predicts the effects of the gate-oxide thickness, channel length, and cell spacing on the IGT forward I-V characteristics for a 100-1200V range in blocking voltage. The relative significance of the MOS/BJT components of the device has been explored. This is particularly important when optimizing designs over a wide range of voltage ratings Careful attention to this has led to greater than a three times improvement in high temperature dynamic latching current This is the key to obtaining a wide safe-operating-area for the IGT. For the first time, an accurate and straightforward mode of the IGT has been developed. The model predictions are within 10% of the experimental data. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
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