High-Power V-Band CMOS Frequency Tripler With Efficient Matching Networks

Autor:	Jong-Ryul Yang, Ui-Gyu Choi, Dong-Jun Shin
Rok vydání:	2021
Předmět:	Computer science Energy conversion efficiency Impedance matching Buffer amplifier Hardware_PERFORMANCEANDRELIABILITY Condensed Matter Physics law.invention Capacitor CMOS Balun law Hardware_INTEGRATEDCIRCUITS Harmonic Electronic engineering Electrical and Electronic Engineering V band
Zdroj:	IEEE Microwave and Wireless Components Letters. 31:1020-1022
ISSN:	1558-1764 1531-1309
DOI:	10.1109/lmwc.2021.3088860
Popis:	A $V$ -band CMOS frequency tripler with efficient input–output, and interstage matching networks is proposed to improve the output power and conversion efficiency. The interstage matching network, located between a tripler-core and a buffer amplifier, simultaneously performs the impedance matching of a desired third harmonic signal and the filtering of unwanted fundamental and even harmonic signals, without an additional power loss in a small area. Wideband operation and differential signal balance characteristics are achieved at the input and output by using a transformer-based balun with a compensation capacitor. The proposed tripler was implemented in a size of 0.476 mm2 using the TSMC 65-nm CMOS technology. Measurement results show a saturated output power of 6.4 dBm with a harmonic rejection of 37 dBc for an input power of 10 dBm at 59.4 GHz. The maximum conversion efficiency is 3.92% with an input power of 6.5 dBm at 59.4 GHz.
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_________::a933585f0de8e7dbafefdcb9b435b3c1 https://doi.org/10.1109/lmwc.2021.3088860 Zobrazit plný text záznamu