Autor: |
Tetsu Tanaka, Rui Liang, Takafumi Fukushima, Murugesan Mariappan, Hisashi Kino, Sungho Lee, Kousei Kumahara, Yuki Miwa |
Rok vydání: |
2019 |
Předmět: |
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Zdroj: |
3DIC |
DOI: |
10.1109/3dic48104.2019.9058843 |
Popis: |
Through-silicon vias (TSVs) is one of the key technologies for 3D integration. To solve the issues induced by the high-temperature process for TSV liner formation in the multichip-to-wafer (MCtW) process, we applied the low-temperature SiO 2 deposition method called OER (Ozone-Ethylene Radical generation)-TEOS-CVD®. In this study, we fabricated the MIS capacitors with the TSV liner deposited by OER-TEOS-CVD® at 150°C and room temperature (RT), and compared both the coverage and electrical characteristics with that formed by conventional plasma-enhanced chemical vapor deposition (PE-CVD) at 200°C. Furthermore, we analyzed these SiO 2 liners by FTIR and synchrotron XPS. These results showed that the OER-TEOS-CVD® has high potentials to realize highly-reliable TSVs and to apply to various processes in 3D integration. |
Databáze: |
OpenAIRE |
Externí odkaz: |
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