| Autor: |
Hugo Bender, Craig Huffman, Stephan Brus, S. Lok, Liesbeth Witters, Christa Vrancken, Philippe Absil, Sofie Mertens, P. Ong, Bertrand Parvais, V. Truffert, D. Laidler, Serge Biesemans, Nancy Heylen, Anabela Veloso, Malgorzata Jurczak, Nadine Collaert, S. Vanhaelemeersch, C. Baerts, M. Ercken, A.M. Goethals, Steven Demuynck, S. Verhaegen, J. De Backer, G.F. Lorusso, Michal Rakowski, K. Shah, D. Goossens, C. Delvaux, L. Romijn, A. De Keersgieter, Kurt G. Ronse, E. Altamirano, J. Hermans, Hans Meiling, Rita Rooyackers, P. Boelen, O. Richard, J. Versluijs, Andriy Hikavyy, J.-F. de Marneffe, J. Gelatos, A. Van Dijk, A. Noori, B. Hultermans, R. Arghavani, R. Schreutelkamp, Marc Demand, Anne Lauwers, B. Baudemprez, R. Cartuyvels, T. Y. Hoffmann, C. Pigneret, F. Van Roey |
| Rok vydání: |
2008 |
| Předmět: |
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| Zdroj: |
2008 IEEE International Electron Devices Meeting. |
| Popis: |
We report on a major advancement in full-field EUV lithography technology. A single patterning approach for contact level by EUVL (NA=0.25) was used for the fabrication of electrically functional 0.186 mum2 6T-SRAMs, with W-filled contacts. Alignment to other 193 nm immersion litho levels shows very good overlay values les20 nm. Other key features of the process are: 1) use of high-k/Metal Gate FinFETs with good gate CD control: 3sigmales7 nm after double-dipole 193 nm immersion litho (NA=0.85) and 3sigmales9 nm after double-Hard Mask gate etch; and 2) use of an ultra-thin NiPt-silicide for S/D and an optimized spacers module without Si recess at dense FINs pitch. Excellent SRAM VDD scalability down to 0.6V (SNM>0.1VDD) and healthy electrical characteristics (VT, sigma(DeltaVT), I-V) for the cell transistors are obtained. |
| Databáze: |
OpenAIRE |
| Externí odkaz: |
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