Architectural tradeoff in implementing RSA processors

Autor: Chia-Jiu Wang, Fu-Chi Chang
Rok vydání: 2002
Předmět:
Zdroj: ACM SIGARCH Computer Architecture News. 30:5-11
ISSN: 0163-5964
DOI: 10.1145/511120.511123
Popis: An investigation of a suite of RSA processors using different exponentiation and modular arithmetic algorithms is the main theme of this paper. The execution time and the amount of hardware required of different algorithms used to implement the RSA processor are compared. The modular algorithms examined in this paper are classical modular algorithm, Barrett's modular algorithm, Hensel's odd division and Montgomery's modular algorithm. The exponentiation algorithms implemented are the left-to-right binary method, the right-to-left binary method, the Chinese remainder theorem. This work finds that the fast RSA processor is the one using the Chinese remainder theorem with right to left scan for exponentiation operations and Barrett's algorithm for modular arithmetic operations. The RSA processor using least amount of hardware is the one using the left-o-right binary method for exponentiation operations and Montgomery's algorithm for modular operations.
Databáze: OpenAIRE