A 12-Gb/s dual-channel transceiver for CMOS image sensor systems
| Autor: | June-Hee Lee, Youngkyun Jeong, Jung-Hoon Chun, Jaehyuk Choi, Hoon Shin, Sang-Hoon Kim |
|---|---|
| Rok vydání: | 2016 |
| Předmět: |
Engineering
business.industry 020208 electrical & electronic engineering Transmitter Latency (audio) 02 engineering and technology CMOS Baud 0202 electrical engineering electronic engineering information engineering Electronic engineering Oversampling Transceiver business Computer hardware Communication channel Jitter |
| Zdroj: | ESSCIRC |
| DOI: | 10.1109/esscirc.2016.7598300 |
| Popis: | We propose a dual-channel interface architecture that allocates high and low transition-density bit streams to two separate channels. The transmitter utilizes the stacked drivers with charge-recycling to reduce the power consumption. The DC-coupled receiver front-end circuits deal with the common-mode level variations and compensate for the channel loss. The tracked oversampling CDR which realizes fast lock acquisition below 1 baud period and low logic latency is shared by the two channels. Fabricated in a 65-nm low-power CMOS technology, the dual-channel transceiver achieves 12-Gb/s data rate while the transmitter consumes 20.43mW from a 1.2V power supply. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
|