Circuit-level information leakage prevention for fault detection
| Autor: | Noriyuki Miura, Kazuo Sakiyama, Takanori Machida, Tatsuya Fujii, Yu-ichi Hayashi, Reina Yagasaki |
|---|---|
| Rok vydání: | 2016 |
| Předmět: |
021110 strategic
defence & security studies Engineering business.industry 0211 other engineering and technologies Cryptography Hardware_PERFORMANCEANDRELIABILITY 02 engineering and technology Information security Fault (power engineering) Fault detection and isolation Power (physics) Embedded system Information leakage 0202 electrical engineering electronic engineering information engineering 020201 artificial intelligence & image processing business Field-programmable gate array Countermeasure (computer) |
| Zdroj: | 2016 URSI Asia-Pacific Radio Science Conference (URSI AP-RASC). |
| DOI: | 10.1109/ursiap-rasc.2016.7601328 |
| Popis: | The security of cryptographic devices is gaining significance, of late, owing to their important role in ensuring information security in the internet of things (IoT). Amongst various implementation attacks, the laser and electromagnetic (EM) fault-based attacks are considered the most powerful because of their control over the injection timing and position. This paper discusses a practical countermeasure against fault attacks, focusing on a secure measure to prevent information leakage, in particular, after a fault is detected. Preliminary experiments using a field programmable gate array (FPGA) board show that cutting off the power supply (VDD) could be an effective counter-measure for preventing information leakage from cryptographic devices under the fault attacks. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
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