Adaptive Grinding and Polishing of Silicon Integrated Circuits to Ultra-Thin Remaining Thickness

Autor: Robert Chivas, Michael DiBattista, Scott Silverman
Rok vydání: 2015
Předmět:
Zdroj: International Symposium for Testing and Failure Analysis.
ISSN: 0890-1740
DOI: 10.31399/asm.cp.istfa2015p0460
Popis: Anticipating the end of life for IR-based failure analysis techniques, a method of global backside preparation to ultra-thin remaining silicon thickness (RST) has been developed. Ultra-thin RST enables VIS light techniques such as laser voltage probing. In this work we investigate the lower RST limit due to sub-surface damage from grinding and a one-step polishing method to achieve 3 um RST (+/- 0.8 um) over 121 mm2 die (11 x 11 mm) test package as well as 5 um (+/- ) over 109.2 mm2 (8.0 x 13.7mm) active device.
Databáze: OpenAIRE