DVLASIC: catastrophic fault yield simulation in a distributed processing environment
| Autor: | Daniel S. Nydick, D.M.H. Walker |
|---|---|
| Rok vydání: | 1990 |
| Předmět: |
Very-large-scale integration
Speedup Computer science Distributed computing Reliability (computer networking) Monte Carlo method Process (computing) Parallel computing computer.software_genre Fault (power engineering) Computer Graphics and Computer-Aided Design Computer Aided Design Electrical and Electronic Engineering computer Software |
| Zdroj: | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 9:655-664 |
| ISSN: | 0278-0070 |
| Popis: | Simulation of local process disturbances is a computationally intensive task. The VLASIC (VLSI LAyout Simulation for Integrated Circuits) catastrophic-fault yield simulator uses a Monte Carlo method that often requires tens of CPU hours to perform a simulation. In order to reduce the simulation time, DVLASIC, the distributed-environment version developed by the authors, achieves a speedup of 13.3 over VLASIC, with an efficiency of 89%. The authors describe the distributed processing environment and implementation techniques used to obtain this speedup. The distributed processing environment can also be applied to many other CAD problems. > |
| Databáze: | OpenAIRE |
| Externí odkaz: |
|