Successful yield ramp using product test, scan and memory diagnosis
| Autor: | Venkatesan Muthumalai, Rao Desineni, Nancy Bell, Ritesh Turakhia, Thomas Berndt, Aaron Sinnott, David Iverson |
|---|---|
| Rok vydání: | 2014 |
| Předmět: |
Engineering
Hardware_MEMORYSTRUCTURES Yield (engineering) business.industry Process development Volume (computing) Hardware_PERFORMANCEANDRELIABILITY Integrated circuit law.invention Reliability engineering law Product (mathematics) Hardware_INTEGRATEDCIRCUITS Electronic engineering Static random-access memory business Electronic circuit |
| Zdroj: | 25th Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC 2014). |
| DOI: | 10.1109/asmc.2014.6846945 |
| Popis: | Fast yield ramp is very important for a foundry during advanced process development and volume production. Logic and SRAM circuits are the major design blocks in advanced Integrated Circuits. Identification of systematic failures in logic and SRAM blocks using product test and diagnostics is critical to increasing the speed of yield learning in sub-40nm ICs. This paper highlights the importance of using logic and SRAM diagnosis for product yield ramp using three yield breakthroughs. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
|