| Autor: |
W. A. K. C. Jayathilaka, H. W. K. M. Amarasekara, S. G. Abeyaratne, H. P. A. P. Jayawardana, P. T. S. Peelikumbura, S. D. Dewasurendra |
| Rok vydání: |
2011 |
| Předmět: |
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| Zdroj: |
2011 6th International Conference on Industrial and Information Systems. |
| DOI: |
10.1109/iciinfs.2011.6038093 |
| Popis: |
This paper presents a simple and clear method to design and implement a reconfigurable elevator controller using an FPGA, which can be implemented for an elevator with any (N) number of floors, with specified inputs and outputs. A model based design approach was followed. We started from a state chart model developed for a prototype elevator with three floors. Extension of the model for a variable number of floors was considered. Controller for the prototype system was implemented in ladder logic on a PLC and the limitations of that approach with regard to re-configurability were identified: viz., in the extension of elevator controller for ‘N’ no of floors. Next VHDL code was developed for a reconfigurable elevator controller where, by changing a variable corresponding to the required number of floors, the suitable code can be generated. The controller thus generated can be implemented in an FPGA. The method was successfully tested on a Xilinx Spartan 3AN FPGA. |
| Databáze: |
OpenAIRE |
| Externí odkaz: |
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