A 0.5 V Low-Power All-Digital Phase-Locked Loop in 65 nm Complementary Metal-Oxide-Semiconductor Process

Autor:	Rico Jossel M. Maestro, Mark Allen D. C. Agaton, Fredrick Angelo R. Galapon, Chris Vincent Densing, Maria Theresa de Leon, Lemuel Neil M. Noveno, Arcel G. Leynes, Marc Rosales, Anastacia B. Alvarez, John Richard E. Hizon
Rok vydání:	2019
Předmět:	Phase-locked loop Materials science CMOS business.industry Process (computing) Optoelectronics Electrical and Electronic Engineering business Power (physics)
Zdroj:	Journal of Low Power Electronics. 15:64-75
ISSN:	1546-1998
DOI:	10.1166/jolpe.2019.1596
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_________::9e3177cb2f6bff576b798c7bb8667d5b https://doi.org/10.1166/jolpe.2019.1596 Zobrazit plný text záznamu