15.5 A 28nm 64Kb 6T SRAM Computing-in-Memory Macro with 8b MAC Operation for AI Edge Chips
| Autor: | Yun-Chen Lo, Yen-Chi Chou, Meng-Fan Chang, Qiang Li, Kea-Tiong Tang, Ruhui Liu, Wei-Chen Wei, Tzu-Hsiang Hsu, Yen-Kai Chen, Ssu-Yen Wu, Zhixiao Zhang, Xin Si, Wei-Chiang Shih, Yajuan He, Chung-Chuan Lo, Syuan-Hao Sie, Jing-Hong Wang, Chih-Cheng Hsieh, Ta-Wei Liu, Yung-Ning Tu, William Shih, Ren-Shuo Liu, Nan-Chun Lien, Jian-Wei Su, Wei-Hsing Huanq, Pei-Jung Lu, Tai-Hsing Wen |
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| Rok vydání: | 2020 |
| Předmět: |
Process variation
Physics Discrete mathematics 020208 electrical & electronic engineering Sram cell Computer Science::Networking and Internet Architecture 0202 electrical engineering electronic engineering information engineering Binary number 02 engineering and technology Static random-access memory Macro 020202 computer hardware & architecture |
| Zdroj: | ISSCC |
| DOI: | 10.1109/isscc19947.2020.9062995 |
| Popis: | Advanced AI edge chips require multibit input (IN), weight (W), and output (OUT) for CNN multiply-and-accumulate (MAC) operations to achieve an inference accuracy that is sufficient for practical applications. Computing-in-memory (CIM) is an attractive approach to improve the energy efficiency $(\mathrm{EF}_{\mathrm{MAC}}]$ of MAC operations under a memory-wall constraint. Previous SRAM-CIM macros demonstrated a binary MAC [4], an in-array 8b W-merging with near-memory computing (NMC) using 6T SRAM cells (limited output precision) [5], a 7b1N-1 bW MAC using a 10T SRAM cell (large area) [3], an 4b1N-5bW MAC with a T8T SRAM cell [1], and 8b1N-1bW NMC with 8T SRAM (long MAC latency $(T_{\mathrm{AC}})$ ) [2]. However, previous works have not achieved high IN/W/OUT precision with fast $\mathrm{T}_{\mathrm{AC}}$ compact-area, high $\mathrm{EF}_{\mathrm{MAC}}$ , and robust readout against process variation, due to (1) small sensing margin in word-wise multiple-bit MAC operations, (2) a tradeoff between read accuracy vs. area overhead under process variation, (3) limited $\mathrm{EF}_{\mathrm{MAC}}$ due to decoupling of software and hardware development. |
| Databáze: | OpenAIRE |
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