Passive and Active Reduction Techniques for On-Chip High-Frequency Digital Power Supply Noise
| Autor: | Yoshinori Nishi, A. Gopalan, Mark Pude, Eric Scott Bohannon, Christopher Urban, P.R. Mukund |
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| Rok vydání: | 2010 |
| Předmět: |
Engineering
business.industry Noise reduction Electrical engineering Chip Capacitance Noise margin Headroom (audio signal processing) Hardware and Architecture Hardware_INTEGRATEDCIRCUITS Electronic engineering Signal integrity Electrical and Electronic Engineering business Software Decoupling (electronics) Active noise control |
| Zdroj: | IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 18:157-161 |
| ISSN: | 1557-9999 1063-8210 |
| Popis: | Signal integrity has become a major problem in digital IC design. One cause is device scaling that results in a sharp reduction of supply voltage, creating stringent noise margin requirements to ensure functionality. This paper introduces both a novel on-chip decoupling capacitance methodology and active noise cancellation (ANC) structure. The decoupling methodology focuses on quantification and location. The ANC structure, with an area of 50 ?m × 55 ?m, uses decoupling capacitance to sense noise and inject a proportional current into VSS as a method of reduction. A chip has been designed and fabricated using TSMC's 90-nm technology. Measurements show that the decoupling methodology improved the average voltage headroom loss by 17% while the ANC structure improved the average voltage headroom loss by 18%. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
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