A simple method for modeling VLSI yields

Autor:	R.J. Rosner, C.H. Stapper
Rok vydání:	1982
Předmět:	Very-large-scale integration Simple (abstract algebra) Yield (chemistry) Materials Chemistry Electronic engineering Function (mathematics) Electrical and Electronic Engineering Condensed Matter Physics Chip Algorithm Electronic Optical and Magnetic Materials Electronic circuit Mathematics
Zdroj:	Solid-State Electronics. 25:487-489
ISSN:	0038-1101
DOI:	10.1016/0038-1101(82)90161-7
Popis:	Data show that simplistic models of yield as a function of chip area are not realistic. Yield of ROS ( R ead O nly S tore) chips as a function of the number of bits results, however, in a smooth relationship. This observation appeared to hold for three manufacturing lines. The authors therefore propose that yields should be modeled by the number of circuits rather than by chip area.
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_________::9cf096a9701b22da6b6a285b6cce2085 https://doi.org/10.1016/0038-1101(82)90161-7 Zobrazit plný text záznamu