Optimization of WiFi Communication System using Low Power Ring Oscillator Delay Cell
| Autor: | Kh Shahriya Zaman, Fahmida Haque, Mamun Bin Ibne Reaz, Norhana Arsad, Sawal Hamid Md Ali |
|---|---|
| Rok vydání: | 2020 |
| Předmět: |
0106 biological sciences
Physics Ring (mathematics) business.industry Electrical engineering 020206 networking & telecommunications Hardware_PERFORMANCEANDRELIABILITY 02 engineering and technology Ring oscillator 01 natural sciences Phase-locked loop Voltage-controlled oscillator CMOS Phase noise Hardware_INTEGRATEDCIRCUITS 0202 electrical engineering electronic engineering information engineering business ISM band 010606 plant biology & botany Data transmission |
| Zdroj: | 2020 IEEE 8th Conference on Systems, Process and Control (ICSPC). |
| DOI: | 10.1109/icspc50992.2020.9305760 |
| Popis: | Modern systems rely on wireless communication for data transmission and system control. Power dissipation and circuit area are crucial factors for such communication systems in portable devices. Ring oscillators are the popular choice for voltage-controlled oscillator (VCO) architecture for Phase locked loop (PLL). This is because ring oscillators exhibit wider tuning range and consume less area on chip. This paper presents a low power ring oscillator designed for wireless application at 5 GHz in the ISM band. A 3-stage starved current voltage-controlled ring oscillator was implemented with $\mathbf{0.13}\ \mu\mathbf{m}$ CMOS technology using ELDO Spice simulator from Mentor Graphics. With supply voltage of 1.2V, the power dissipation is 1.08 mW and the phase noise is -78 dBc/Hz at 1 MHz additionally, the proposed ring oscillator with new delay cell layout size occupied 7.1 by $\mathbf{11.7}\ \mu\mathbf{m}^{\mathbf{2}}$ . |
| Databáze: | OpenAIRE |
| Externí odkaz: |
|