Interface optimization for poly silicon/tungsten gates
| Autor: | Sven Schmidbauer, Jens Hahn, Olaf Storbeck, Frank Jakubowski, Jürgen Faul, Axel Buerke, Yu-Wei Ting, Thomas Schuster |
|---|---|
| Rok vydání: | 2008 |
| Předmět: |
Dynamic random-access memory
Materials science business.industry Interface (computing) Transistor Contact resistance Integrated circuit Condensed Matter Physics Atomic and Molecular Physics and Optics Surfaces Coatings and Films Electronic Optical and Magnetic Materials law.invention Stack (abstract data type) law Optoelectronics Electrical and Electronic Engineering business Gate equivalent Dram |
| Zdroj: | Microelectronic Engineering. 85:2037-2041 |
| ISSN: | 0167-9317 |
| DOI: | 10.1016/j.mee.2008.07.010 |
| Popis: | Novel dual work function (DWF) based transistors featuring low gate resistances are presented. The process discussed enables extremely fast array timings easily and is thus key to fulfilling the performance requirements for high performance DRAM chips. The key enabler of the advanced gate integration scheme and its properties is the understanding of tuning the interface contact resistance. The objective of this work was to systematically investigate the role of the interface between poly-Si and metal of DRAM gate structures focused on electrical data. Contact resistance values, speed and elemental analysis information summarize the main findings of the gate development and furthermore the stable control of the very thin film stack in high volume production. |
| Databáze: | OpenAIRE |
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