| Autor: |
Ming-Chong Huang, Po-Chih Wang, Chia-Jun Chang, Kai-Te Chen, Chun-Cheng Wang, Ying-His Lin, Chao-Hua Lu, Chao-Cheng Lee, Pei-Ju Chiu, Yi-Ming Chang, Ka-Un Chan, Wei-Ming Chiu, Shih-Min Lin |
| Rok vydání: |
2007 |
| Předmět: |
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| Zdroj: |
2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium. |
| Popis: |
A fully integrated transmitter front end with on-chip power amplifier (PA) in 0.18 um CMOS technology is presented. The on-chip PA employs dynamic bias technique to reduce power consumption and enhance linearity. In the measurement, it reveals the output PldB of the PA is 26.5 dBm. Also, the transmitter delivers an average power of 17.3 dBm with EVM of -28.1 while drawing 225 mA of DC current (PA 157 mA) from 3.3 V supply. The low power consumption, adequate linearity and high integration make this transmitter suitable for WLAN application. |
| Databáze: |
OpenAIRE |
| Externí odkaz: |
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