Fan-Out Wafer-Level Packaging (FOWLP) of Large Chip with Multiple Redistribution Layers (RDLs)
| Autor: | Jeffery C. C. Lo, Jiang Ran, Yiu Ming Cheung, Thomas Taylor, Ning-Cheng Lee, Rozalia Beica, Cheng-Ta Ko, Sze Pei Lim, Wu Kai, Nelson Fan, Koh Sau Wee, Ming Li, Yao-Der Chen, Ricky Lee, Margie Li, John H. Lau, Zhang Li, Cao Xi, Eric Kuah, Iris Xu, Qingxiang Yong, Kim Hwee Tan, Mian Tao, Henry Yang, Tony Chen, Ji Hao |
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| Rok vydání: | 2017 |
| Předmět: |
010302 applied physics
Materials science Computer Networks and Communications business.industry Compression molding Fan-out 02 engineering and technology Epoxy 021001 nanoscience & nanotechnology Chip 01 natural sciences Electronic Optical and Magnetic Materials visual_art 0103 physical sciences visual_art.visual_art_medium Optoelectronics Wafer dicing Wafer Redistribution layer Electrical and Electronic Engineering 0210 nano-technology business Wafer-level packaging |
| Zdroj: | Journal of Microelectronics and Electronic Packaging. 14:123-131 |
| ISSN: | 1551-4897 |
| DOI: | 10.4071/imaps.522798 |
| Popis: | This study is for fan-out wafer-level packaging with chip-first (die face-up) formation. Chips with Cu contact-pads on the front side and a die attach film on the backside are picked and placed face-up on a temporary-glass-wafer carrier with a thin layer of light-to-heat conversion material. It is followed by compression molding with an epoxy molding compound (EMC) and a post-mold cure on the reconstituted wafer carrier and then backgrinding the molded EMC to expose the Cu contact-pads of the chips. The next step is to build up the redistribution layers (RDLs) from the Cu contact-pads and then mount the solder balls. This is followed by the debonding of the carrier with a laser and then the dicing of the whole reconstituted wafer into individual packages. A 300-mm reconstituted wafer with a package/die ratio = 1.8 and a die-top EMC cap = 100 μm has also been fabricated (a total of 325 test packages on the reconstituted wafer). This test package has three RDLs; the line width/spacing of the first RDL is 5 μm/5 μm, of the second RDL is 10 μm/10 μm, and of the third RDL is 15 μm/15 μm. The dielectric layer of the RDLs is fabricated with a photosensitive polyimide and the conductor layer of the RDLs is fabricated by electrochemical Cu deposition (ECD). |
| Databáze: | OpenAIRE |
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