Application of the layout-aware single event simulations to a design of 65 nm memory units

Autor:	Anton O. Balbekov
Rok vydání:	2018
Předmět:	Computer science Page layout Event (computing) business.industry Design flow Register file Semiconductor device modeling Dice computer.software_genre Upset Static random-access memory business computer Computer hardware
Zdroj:	2018 Moscow Workshop on Electronic and Networking Technologies (MWENT).
DOI:	10.1109/mwent.2018.8337197
Popis:	This paper reports about an application of our technique to the actual design procedure of the single event effect tolerant 65nm SRAM and register file cells, which are based on DICE and 6T cells. The technique is integrated to a design flow, accepted in our department. Input data for the analysis is layout and circuit designs of the cells. Layout design from later stages of the cells design flow is used. Output data are cross section plots and upset multiplicity maps.
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_________::9b06646e836ce008ece8ee7c0a624346 https://doi.org/10.1109/mwent.2018.8337197 Zobrazit plný text záznamu