Drop failure modes of Sn–3.0Ag–0.5Cu solder joints in wafer level chip scale package
| Autor: | Yi-qian He, Shuang Liu, Mingliang Huang, Ning Zhao |
|---|---|
| Rok vydání: | 2016 |
| Předmět: |
010302 applied physics
Materials science Drop (liquid) Metals and Alloys 02 engineering and technology 021001 nanoscience & nanotechnology Geotechnical Engineering and Engineering Geology Condensed Matter Physics Chip 01 natural sciences Printed circuit board Chip-scale package JEDEC memory standards Soldering 0103 physical sciences Materials Chemistry Forensic engineering Redistribution layer Wafer Composite material 0210 nano-technology |
| Zdroj: | Transactions of Nonferrous Metals Society of China. 26:1663-1669 |
| ISSN: | 1003-6326 |
| DOI: | 10.1016/s1003-6326(16)64272-3 |
| Popis: | To reveal the drop failure modes of the wafer level chip scale packages (WLCSPs) with Sn–3.0Ag–0.5Cu solder joints, board level drop tests were performed according to the JEDEC standard. Six failure modes were identified, i.e., short FR-4 cracks and complete FR-4 cracks at the printing circuit board (PCB) side, split between redistribution layer (RDL) and Cu under bump metallization (UBM), RDL fracture, bulk cracks and partial bulk and intermetallic compound (IMC) cracks at the chip side. For the outmost solder joints, complete FR-4 cracks tended to occur, due to large deformation of PCB and low strength of FR-4 dielectric layer. The formation of complete FR-4 cracks largely absorbed the impact energy, resulting in the absence of other failure modes. For the inner solder joints, the absorption of impact energy by the short FR-4 cracks was limited, resulting in other failure modes at the chip side. |
| Databáze: | OpenAIRE |
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